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L4963 L4963D
1.5A SWITCHING REGULATOR
1.5A OUTPUT LOAD CURRENT 5.1 TO 36V OUTPUT VOLTAGE RANGE DISCONTINUOUS VARIABLE FREQUENCY MODE PRECISE (+/-2%) ON CHIP REFERENCE VERY HIGH EFFICIENCY VERY FEW EXTERNAL COMPONENTS NO FREQ. COMPENSATION REQUIRED RESET AND POWER FAIL OUTPUT FOR MICROPROCESSOR INTERNAL CURRENT LIMITING THERMAL SHUTDOWN
Powerdip12+3+3
SO20
ORDERING NUMBERS:
DESCRIPTION The L4963 is a monolithic power switching regulator delivering 1.5A at 5.1V. The output voltage is adjustable from 5.1V to 36V, working in discontinuous variable frequency mode. Features of the device include remote inhibit, internal current limiting and thermal protection, reset and power fail outputs for microprocessor. BLOCK DIAGRAM
L4963W
L4963D
The L4963 is mounted in a 12+3+3 lead Powerdip (L4963) and SO20 large (L4963D) plastic packages and requires very few external components.
June 2000
This is advanced information on a new product now in development or underogin evaluation. Details are subject to change without notice.
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ABSOLUTE MAXIMUM RATINGS
Symbol SO20 Vi V3-V2 V2 V2 V8 V9, V11 V10 V13, V18 V19, V20 Ptot V7 V8, V10 V9 V12, V16 V17, V18 Powerdip Input Voltage (pin 1 and pin 3 connected togheter) Input to Output Voltage Difference Negative Output DC Voltage Negative Output Peak Voltage at t=0.2 s, f=50kHz Power Fail Input Reset and Power Fail Output Reset Delay Input Feedback and Inhibit Inputs Oscillator Inputs Total Power Dissipation Tpins 90C (Power DIP) (Tamb = 70C no copper area on PCB) (Tamb = 70C, 4cm2 copper area on PCB) Storage & Junction Temperature (Tamb = 70C 6cm2 copper area on PCB) Total Power Dissipation Tpins 90C (SO20L) 47 47 -1 -5 25 Vi 5.5 7 5.5 5 1.3 2 -40 to 150 1.45 4 V V V W W W C W W V V V V V Parameter Value Unit
Tstg, Tj Ptot
PIN CONNECTION (top view)
Powerdip18
SO20
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PIN FUNCTIONS
SO20L 1 2 3 4, 5, 6, 7 14, 15, 16, 17 8 Power DIP 1 2 3 4, 5, 6 13, 14, 15 7 Name SIGNAL SUPPLY VOLTAGE OUTPUT SUPPLY VOLTAGE GROUND Description Must be Connected to pin 3 Regulator output Unregulated voltage input. An internal regulator powers the internal logic. Common ground terminal Input of the power fail circuit. The threshold can be modified introducing an external voltage divider between the Supply Voltage and GND. Open collector power fail signal output. This output is high when the supply voltage is safe. A capacitor connected between this terminal and ground determines the reset signal delay time. Open collector reset signal output. This output is high when the output voltage value is correct. Reference voltage output. Feedback terminal of the regulation loop. The output is connected directly to this terminal for 5.1V operation; it is connected via a divider for higher voltages. TTL level remote inhibit. A logic low level on this input disables the device. Oscillator waveform. A capacitor connected between this terminal and ground modifies the maximum oscillator frequency. A resistor connected between this terminal and ground defines the maximum switching frequency.
POWER FAIL INPUT
9 10 11 12
8 9 10 11
POWER FAIL OUTPUT RESET DELAY RESET OUTPUT REFERENCE VOLTAGE
13
12
FEEDBACK INPUT
18
16
INHIBIT INPUT
19
17
C OSCILLATOR
20
18
R OSCILLATOR FREQ.
THERMAL DATA
Symbol Rth j-pins Rth j-amb
(*) See Fig. 28
Parameter Thermal Resistance Junction to Pins Thermal Resistance Junction to Ambient (*) max. max.
SO20 15 85
Powerdip 12 80
Unit C/W C/W
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CIRCUIT DESCRIPTION (Refer to Block Diagram) The L4963 is a monolithic stepdown regulator providing 1.5A at 5.1V working in discontinuous variable frequency mode. In normal operation the device resonates at a frequency depending primarily on the inductance value, the input and output voltage and the load current. The maximum switching however can be limited by an internal oscillator, which can be programmed by only one external resistor. The fondamental regulation loop consists of two comparators, a precision 5.1V on-chip reference and a drive latch. Briefly the operation is as follows: when the choke ends its discharge the catch freewheeling recirculation filter diode begins to come out of forward conduction so the output voltage of the device approaches ground. When the output voltage reaches -0.1V the internal comparator sets the latch and the power stage is turned on. Then the inductor current rises linearly until the voltage sensed at the feedback input reaches the 5.1V reference. The second comparator then resets the latch and the output stage is turned off. The current in the choke falls linearly until it is fully discharged, then the cycle repeats. Closing the loop directly gives an output voltage of 5.1V. Higher output voltages are Figure 1: Reset and Power Fail Function obtained by inserting a voltage divider and this method of control requires no frequency compensation network. At output voltages greater than 5.1V the available output current must be derated due to the increased power dissipation of the device. Output overload protection is provided by an internal current limiter. The load current is sensed by a on-chip metal resistor connected to a comparator which resets the latch and turns off the power stage in overload condition. The reset circuits (see fig. 1) generates an output high signal when the output voltage value is correct. It has an open collector output and the output signal delay time can be programmed with an external capacitor. A powerfail circuit is also available and is used to monitor the supply voltage. Its output goes high when the supply voltage reaches a pre-programmed treshold set by a voltage divider to its input from the supply to ground. With the input left open the threshold is approximately equal to 5.1V. The output of the power fail is an open collector. A TTL level inhibit is provided for applications such as remote on/off control. This input is activated by a low logic level and disables circuits operation. The thermal overload circuit disables the device when the junction temperature is about 150C and has hysteresis to prevent unstable conditions.
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ELECTRICAL CHARACTERISTIC (Refer to the test circuit Vi = 30V Tj = 25C unless otherwise specified )
Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig.
DYNAMIC CHARACTERISTICS
Vo Vi V12 I12 VOS12 Vo Vo Vd I2L Io SVR V11 Output Voltage Range Input Voltage Range Feedback Voltage Input Bias Current Input Offset Voltage Line Regulation Load Regulation Dropout Voltage Between pin 3 and pin 2 Current Limiting Maximum Operating Load Current Supply Voltage Ripple Rejection Reference Voltage Average Temperature Coefficient of Ref. Volt. V11 V11 Tsd Vref Line Regulation Vref Line Regulation Efficiency Thermal Shutdown Junction Temperature Hysteresis Vi = 9 to 46V Vo = Vref Io = 0.5A Vo = Vref Io = 0.5 to 1.5A I2 = 3A Vi = 20V Vi = 9 to 46V Vo = Vref to 28V Vi = 9 to 46V Vo = Vref Vi = 2Vrms Vo = Vref fripple = 100Hz Io = 1.5A Vi = 9 to 46V O < I11 < 5mA Tj = 0 to 125 C Vi = 9 to 46V Iref = 0 to 5mA Vi = 46V Rosc = 51K Io = 1.5A Vo = Vref 65 69 65 145 3.5 1.5 50 5 56 5.1 0.4 10 7 75 150 30 20 15 5.2 Vi = 46V Io = 0.5A Vo = Vref to 36V Io = 0.5A Vi = 9 to 46V Io = 0.5A Vi = 15V V12 = 6V V17f = 5V Vref 9 5 5.1 5 5 15 15 1.5 36 46 5.2 20 10 50 45 2 6.5 V V V A mV mV mV V A A dB V mV/C mV mV % C C 2 2 2 3a 3a 2 2 2 2 2 2 3a - 3a 3a 2 - -
DC CHARACTERISTICS
Iq Quescent Drain Current Vi = 46V Io = 0mA V16 = V12 = 0 V16 = Vref V12 = 5.3V 14 11 20 16 mA mA 3a 3a
INHIBIT
V16L V16H I16L I16L Low Input Voltage High Input Voltage Input Current with Low Input Voltage Input Current with High Input Voltage Vi = 9 to 46V Vi = 9 to 46V V16 = 0.8V V16 = 2V 0.3 2 50 10 0.8 5.5 100 20 V V A A 2 2 2 2
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ELECTRICAL CHARACTERISTIC (Continued)
Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig.
RESET
V12 V12 V9D V9F -I9SO I9SI I10 V10 Rising Threshold Voltage Falling Threshold Voltage Delay Rising Thereshold Voltage Delay Falling Thereshold Voltage Delay Source Current Delay Sink Current Output Leakage Current Output Saturation Volt. V9 = 4.7V V12 = 5.3V V9 = 4.7V V12 = 4.7V Vi = 46V V7 = 8.5V I10 = 15mA; VI = 3 to 46V Vi = 9 to 46V Vi = 9 to 46V V7 = OPEN Vref -150 Vref -150 4.3 1 70 10 50 0.4 Vref -100 Vref -200 4.5 1.5 110 Vref -50 Vref -250 4.7 2 140 mV mV V V A mA A V 3b 3b 3b 3b 3b 3b 3b 3b
POWER FAIL
VR VF V7 V7 Vs Is Rising Threshold Voltage Falling Threshold Voltage Rising Threshold Voltage Falling Threshold Voltage Output Saturation Volt. Output Leakage Current Pin7 = open Pin7 = open Vi = 20V Vi = 20V Ia = 5mA Vi = 46V 17.5 14.25 4.14 3.325 19 15 4.5 3.5 20.5 15.75 4.86 3.675 0.4 50 V V V V V A 3C 3c - - 3c 3c
OSCILLATOR
f f Oscillator Frequency Oscillator Frequency RT = 51K VI = 9 to 46V Tj = 0 to 125C RT = 51K 46 42 60 79 83 kHz kHz - -
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Figure 2: Test Circuit
Figure 3: DC Test Circuit Figure 3a
Figure 3b
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Figure 3c
Figure 4: Quiescent Drain Current vs. Supply Voltage (0% Duty Cycle)
Figure 5: Quiescent Drain Current vs. Supply Voltage (100% Duty Cycle)
Figure 6: Quiescent Drain Current vs. Junction Temperature (0% Duty Cycle)
Figure 7: Quiescent Drain Current vs. Junction Temperature (100% Duty Cycle)
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Figure 8: Reference Voltage vs. Vi Figure 9: Reference Voltage vs. Tj
Figure 10: Line Transient Response
Figure 11: Load Transient
Figure 12: Supply Voltage Ripple Rejection vs. Frequency
Figure 13: Dropout Voltage Between pi3 and 2 vs. Current at pin2
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Figure 14: Dropout Voltage Between pin3 and 2 vs. Junction Temperature Figure 15: Maximum Allowable PowerDissipation vs. Ambient Temperature (Powerdip Package Only)
Figure 16: Power Dissipation (device only) vs. Input Voltage (Powerdip Package Only)
Figure 17: Power Dissipation (device only) vs. Output Voltage (Powerdip Package Only)
Figure 18: Voltage and Current Waveform at pin2
Figure 19: Efficiency vs. Output Current (Powerdip Package Only)
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Figure 20: Efficiency vs. Output Voltage (Powerdip Package Only) Figure 21: Current Limit vs. Junction Temperature Vi = 30V
Figure 22: Current Limit vs. Input Voltage
Figure 23: Oscillator Frequency vs. R2 (see fig. 26)
Figure 24: Oscillator Frequency vs. Junction Temperature
Figure 25: Oscillator Frequency vs. Input Voltage
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Figure 26: Evaluation Board Circuit
PART LIST
CAPACITOR C1 C2 C3 C4 1000F 50V EKR (*) 2.2mF 16V 1000F 40V with low ESR 1F 50V film RESISTOR R1 R2 R3 R4 R5, R6 1K 51K 1K 1K see table Resistor Values for Standard Output Voltages VO 12 15 18 24 R6 4.7K 4.7K 4.7K 4.7K R5 6.2K 9.1KW 12KW 18KW
Diode: BYW98 Core: L = 40H Magnetics 58121-A2MPP 34 Turns 0.9mm (20AWG)
(*) Minimum 100F if Vi is a preregulated offline SMPS output or 1000F if a 50Hz transformer plus rectifiers is used.
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Figure 27: P.C. Board and Component Layout of the Circuit of fig. 26 (Powerdip Package) (1:1 scale).
Figure 28: Thermal Characteristics
Figure 29: Junction to Ambient Thermal Resistance vs. Area on Board Heatsink (SO20)
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Figure 30: A Minimal 5.1 Fixed Regulator -- Very Few Components are Required
Figure 31: A Minimal Components count for VO = 12V
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mm MIN. a1 B b b1 D E e e3 F I L Z 3.30 2.54 8.80 2.54 20.32 7.10 5.10 0.130 0.38 0.51 0.85 0.50 0.50 24.80 0.346 0.100 0.800 0.280 0.201 0.015 1.40 TYP. MAX. MIN. 0.020 0.033 0.020 0.020 0.976 0.055 inch TYP. MAX.
DIM.
OUTLINE AND MECHANICAL DATA
Powerdip 18
0.100
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mm DIM. MIN. A A1 B C D E e H h L K 10 0.25 0.4 2.35 0.1 0.33 0.23 12.6 7.4 1.27 10.65 0.75 1.27 0.394 0.010 0.016 TYP. MAX. 2.65 0.3 0.51 0.32 13 7.6 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 0.050 0.419 0.030 0.050 TYP. MAX. 0.104 0.012 0.020 0.013 0.512 0.299 inch
OUTLINE AND MECHANICAL DATA
SO20
0 (min.)8 (max.)
L
h x 45
A B e K H D A1 C
20
11 E
1
0 1
SO20MEC
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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